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Tech Logic

Tracks the technical systems, bottlenecks, and standards that reshape industrial power before they become mainstream narratives.

TSO / High confidence

Huawei Introduces the Tau Scaling Law: Pursuing New Paths to Improve Chip Efficiency Through Advanced Packaging, 3D Stacking, and Logic Layering

At the end of May 2026, Huawei publicly explained its new chip concept, the “Tau Scaling Law” or “Tau Law,” emphasizing that it would no longer rely solely on continued transistor miniaturization, but instead improve chip density, performance, and efficiency through advanced packaging, 3D stacking, and LogicFolding. Reuters and The Wall Street Journal both confirmed this direction; related DIGITIMES coverage mentioned the role of glass substrates in this approach, although the main article did not directly expand on Huawei’s chip technology. Some details, such as whether glass substrates are central and the exact scope of industry impact, could not be fully confirmed from the available sources.

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TSO / High confidence

Lisuan Tech’s First In-House GPU, the LX 7G100, Sells Out and Draws Reviews: Compatibility Is Taking Shape, but Performance Still Trails Mainstream Nvidia GPUs

After the launch of Lisuan Tech’s first self-developed graphics card, the Lisuan LX 7G100, media outlets and reviewers focused on its sell-out status, compatibility, and performance. Three sources consistently confirm that the card has been sold publicly and that the company said the first 30,000 units were sold out. It also appears to support Windows, DirectX 12, Vulkan, OpenCL, and OpenGL. On performance, sources indicate it can come close to the Nvidia RTX 3060 in some tests, but it still struggles to compete with mainstream Nvidia GPUs overall. Claims that it is explicitly positioned against the RTX 4060, as well as more complete benchmark details, could not be fully confirmed from the available sources.

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TSO / High confidence

Tata Electronics and ASML sign cooperation pact to introduce lithography technology for Dholera wafer fab in India

Tata Electronics and ASML have reached an agreement or memorandum of understanding related to lithography equipment and technology for the Dholera wafer fab in Gujarat, India. Confirmed information shows the cooperation focuses on building India’s first front-end semiconductor manufacturing plant, introducing ASML lithography tools, and coordinating local talent, supply chain, and R&D efforts. However, sources differ on the nature of the deal, wording details, and cooperation priorities.

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TSO / High confidence

NASA JPL Tests Next-Generation RISC-V Space Processor: Radiation, Thermal, and Shock Trials Underway, Performance Pointing to up to 100x Capacity

NASA JPL is testing a radiation-hardened, high-performance space computing processor developed in collaboration with Microchip. Three sources confirm that testing began in February and includes radiation, thermal, and shock trials; two sources explicitly note that current test results show roughly 500 times the performance of the radiation-hardened chips now in use. The “up to 100x computing capacity” claim is part of the event summary, but it cannot be directly confirmed from the three provided sources.

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TSO / High confidence

ASML CEO on EUV Lithography and Competitive Challenges: High-NA/Low-NA, Advanced-Node Position, and AI Chip Supply Dispute

Three sources point to the same core theme in remarks by ASML CEO Christophe Fouquet: EUV lithography remains a critical part of advanced chip manufacturing, and ASML maintains a firm view of its own technological position. However, the specific economics of High-NA versus Low-NA EUV, as well as the stated reasons behind constraints on China’s AI progress, are not consistently covered across the sources, and some details cannot be directly confirmed from the materials provided.

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